1. Field of the Invention
The present invention relates to superconducting digital logic circuits and more particularly to a current regulator for superconducting digital logic circuits. This regulator utilizes a non-hysteretic Josephson junction in conjunction with various types of Josephson junction logic to provide constant current control and/or biasing of a superconducting digital logic circuits in order, for example, to improve the noise isolation of the circuit from external noise, to improve the tolerance and the manufacturing yield of such devices to fabrication process variances, and to dramatically reduce circuit bias power consumption.
2. Description of the Prior Art
Josephson junctions, named after Brian Josephson, who predicted the device in 1962, are generally known in the art. Examples of such Josephson junctions are disclosed in U.S. Pat. Nos. 5,411,937; 5,278,140; 5,560,836 and 5,892,243, hereby incorporated by reference. In general, such Josephson junctions include two superconductors separated by an insulating barrier. Such Josephson junctions, are known to be formed on a substrate, such as SiO2, MgO, LaAlO3, YSZ, SrTiO3 and NdGaO3, for example, as disclosed in U.S. Pat. No. 5,560,836. In general, a superconducting material is deposited on the substrate forming two continuous superconducting regions.
Both hysteretic and non-hysteretic Josephson junctions are known. In particular, Josephson junctions formed from various metals or metal oxides having superconducting properties at low temperatures exhibit a characteristic hysteresis effect. More recently, various ceramic materials have been found to exhibit superconductivity at relatively higher temperatures than metals. These ceramic superconductive materials allow operation of the superconducting circuits with relatively lower cooling power requirement and higher overall energy efficiencies. These ceramic based superconductor materials are non-hysteretic.
Josephson junctions are known to be used in signal processing applications, such as in digital logic circuits. In such applications, two or more Josephson junctions are known to be connected together in a superconducting loop forming a superconductive quantum interference device (SQUID). Examples of signal processing circuits formed from Josephson junctions and SQUIDs are disclosed in U.S. Pat. Nos. 4,785,426; 5,942,997; 6,127,960; 5,051,627; 4,371,796; 4,092,553; 6,229,332, and 4,501,975, hereby incorporated by reference.
Two primary types of superconductive digital logic circuits are known; voltage state latching logic and single flux quantum (SFQ) logic. Both voltage state latching logic and SFQ logic require constant current biasing of the Josephson junctions forming the logic circuits. In particular, as shown in FIG. 8, known superconducting logic circuits, generally identified with the reference numeral 99, are powered from an off chip power supply 92, which normally provides a relatively constant voltage to the logic circuit 99. Current from the off chip power supply 92 is limited by a current limiting bias resistor 90. The magnitude of the bias resistor 90 is determined by the isolation requirements between the power source bus 92 and the logic device 99. In particular, the bias resistor 90 is often selected to be relatively large such that the voltage drop across it is 5 to 10 times or more larger than the voltage drop across the Josephson junction logic device 99. This is done to provide constant current to the logic element 99, which is nominally independent of the logic state of device 99 and to isolate the changes occurring in the logic device 99 from the power bus above the resistor 90 and hence isolate the rest of the logic circuit from the logic state of the logic circuit device 99. This method of biasing the logic element is wasteful of the total circuit power.
Unfortunately, during fabrication, the resistance R of the biasing resistor 90 is determined in a completely independent processing step from that which determines the average critical current density Ic of the Josephson junctions forming the logic circuits. Thus, any fabrication process fluctuations affecting the biasing resistor 90 will affect the constant current supplied to the digital logic circuit 99, totally independent of the average critical current density required by the Josephson junctions forming the logic circuit. As such, process fluctuations can significantly reduce the manufacturing yield of such circuits.
One known approach to improve the on-chip voltage/current control to such superconducting logic devices is as shown in FIG. 1. Such superconducting logic devices generally identified with the reference numeral 20, are known to be powered from an off chip power supply 22, which normally provides a relatively constant voltage to the bias resistor of the logic circuit. The distribution of the current from the off chip power supply 22 to the logic gate 20 is known to be regulated on chip by way of a hysteretic Josephson junction 24, a current limiting resistor 26, and a biasing resistor 28. The Josephson junction 24 acts as a constant voltage source (somewhat like a semiconductor zener diode) which latches to the gap voltage VG of the Josephson junction 24. In its desired operating mode, the hysteretic junction 24 operates along portion 42 of the I/V curve illustrated in FIG. 3. The common node between the Josephson junction 24, current limiting resistor 26 and biasing resistor 28 is held at a relative constant voltage, independent (over a limited operating range) of the changes in the supply voltage 22. This fixed voltage at this node, combined with the fixed bias resistor 28, assures a constant current to the logic element 20. Current from the off chip power supply 22 is limited by the current limiting resistor 26. The magnitude of the biasing resistor 28 determines the current supply to the logic circuit 20 (i.e., VG/R). But for non-hysteretic Josephson junction logic, the regulated voltage of Vg provided by this approach is many times larger than the actual voltage existing across the Josephson junction logic devices, hence, still wasting significant power in the large bias resistor 28, as discussed above, as well as in the relative large regulator current limiting resistor 26 (for which as much as 1.5 times or more power is dissipated above the circuit power requirement). Thus, there is a need to replace these and other passive relatively large resistors with some other means to control the current flow as well as provide the necessary circuit element isolation while at the same time providing a current regulator in which the manufacturing yield is not as dependent upon the processing fluctuation differences between that of thin film resistors used to determine the on chip constant current supply and that of the logic elements.